DocumentCode :
448786
Title :
Area word-length trade off in DSP algorithm implementation and optimization
Author :
Ahmadi, A. ; Zwolinski, M.
fYear :
2005
fDate :
19-20 Sept. 2005
Abstract :
In this paper we propose a platform for high level synthesis of DSP algorithms while emphasising the differences between DSP systems and other digital systems. Accordingly, we allow variable word lengths within the system in order to optimize the system digital noise versus area. Using particular target architecture, a suitable cost function, together with a synthesiser and optimizer and intermediate data bases have been implemented. Optimization is based on a genetic algorithm.
Keywords :
digital signal processing chips; genetic algorithms; network synthesis; DSP algorithm implementation; area word-length trade off; genetic algorithm; high level synthesis; system digital noise;
fLanguage :
English
Publisher :
iet
Conference_Titel :
DSPenabledRadio, 2005. The 2nd IEE/EURASIP Conference on (Ref. No. 2005/11086)
Conference_Location :
IET
ISSN :
0537-9989
Print_ISBN :
0-86341-560-1
Type :
conf
Filename :
1575349
Link To Document :
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