Title :
Development in Verification of Design Correctness
Author :
Cory, W.E. ; vanCleemput, W.M.
Author_Institution :
Stanford University, Stanford, CA
Abstract :
This paper reviews recent developments in the verification of digital systems designs. The emphasis is on proof of functional correctness. Some of the techniques reviewed are symbolic simulation (including parallel simulation of HDL descriptions), dataflow verfication by grammar construction, comparison of manually generated design with automated design, and functional abstraction.
Keywords :
Application software; Computational modeling; Digital systems; Documentation; Hardware design languages; Humans; Permission; System testing; Tiles; Timing;
Conference_Titel :
Design Automation, 1980. 17th Conference on
Print_ISBN :
0-89791-020-6
DOI :
10.1109/DAC.1980.1585242
