DocumentCode :
450415
Title :
Methods for Generalized Deductive Fault Simulation
Author :
Giambiasi, N. ; Miara, A. ; Muriach, D.
Author_Institution :
Laboratoire d´´Automatique de Montpellier, Universite des Sciences t Techniques du Languedoc, Montpellier-cedex, France
fYear :
1980
fDate :
23-25 June 1980
Firstpage :
386
Lastpage :
393
Abstract :
In this paper, the authors describe methods for generalized deductive fault simulation of digital networks. By introducing the notion of unknown fault list, the propagation algorithm through gates modelized with rise and fall times are simplified with the same accuracy.
Keywords :
Accuracy; Circuit faults; Circuit simulation; Computational modeling; Delay; Logic circuits; Logic gates; Permission; Steady-state; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1980. 17th Conference on
Print_ISBN :
0-89791-020-6
Type :
conf
DOI :
10.1109/DAC.1980.1585276
Filename :
1585276
Link To Document :
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