Title :
A Vector Hardware Accelerator with Circuit Simulation Emphasis
Author :
Vladimirescu, Andrei ; Weiss, David ; Katevenis, Manolis ; Bronstein, Zvika ; Kfir, Alon ; Danuwidjaja, Karja ; Ng, K.C. ; Jain, Niraj ; Lass, Steve
Author_Institution :
Stanford University, Palo Alto, CA
Abstract :
A floating-point vector accelerator has been built which runs circuit simulation efficiently. The design considerations of the accelerator are based on the time-consuming parts of SPICE2, available off-the-shelf parts, advanced software tools experience and cost/performance. The three board accelerator can run the entire application program complied from a high-level language. A personal workstation, such as the PC-AT, is used for the general I/O tasks such as file handling and network support. The processor has a Single-Instruction Multiple-Data 64-bit floating-point pipelined architecture. It can achieve a maximum speed of 8 Mips and 8 MFlops. A floating-point processor based on two functional units, a multiplier and an ALU, and an integer processor work in parallel to achieve the high performance. The accelerator attached to a PC-AT runs SPICE2 60 times faster than the personal workstation alone and achieves double the performance of a VAX 8650.
Keywords :
Application software; Circuit simulation; Computational modeling; Computer aided engineering; Engines; Hardware; Logic arrays; Permission; Software tools; Workstations;
Conference_Titel :
Design Automation, 1987. 24th Conference on
Print_ISBN :
0-8186-0781-5
DOI :
10.1109/DAC.1987.203226