DocumentCode :
450463
Title :
A Hardware Switch Level Simulator for Large MOS Circuits
Author :
Smith, Mark T.
Author_Institution :
Hewlett Packard Laboratories, Palo Alto, CA
fYear :
1987
fDate :
28-1 June 1987
Firstpage :
95
Lastpage :
100
Abstract :
The HSS is a Hardware Switch level Simulator that has been designed and built to be a useful and cost effective addition to a MOS circuit designers tool set. The HSS is based on the MOSSIM software simulator, but has been further developed to include hardware for simulating pass transistor circuits and for doing timing simulation. By using dynamic RAM for internal list storage, a single HSS processor can accommodate a circuit of up to 262,144 MOS devices. The HSS can be interfaced to a variety of host computers via a general purpose parallel interface, and in its current form offers a 25 times speed improvement compared to MOSSIM II running on a VAX 11-780. Timing mode offers similar speed advantages, with delay calculations that are sufficiently accurate for many simulation tasks.
Keywords :
Circuit simulation; Computational modeling; Computer interfaces; Costs; DRAM chips; Hardware; MOS devices; Switches; Switching circuits; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1987. 24th Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0781-5
Type :
conf
DOI :
10.1109/DAC.1987.203227
Filename :
1586211
Link To Document :
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