Title :
Transistor Sizing in CMOS Circuits
Author :
Cirit, Mehmet A.
Author_Institution :
Silicon Design Labs, Liberty Corner, NJ
Abstract :
The problem of optimally sizing transistors in a VLSI CMOS circuit is considered. Models and algorithms for performing optimization on a single path using RC-tree approximation are presented. The results of an automatic optimization procedure are discussed.
Keywords :
Capacitance; Circuits; Delay; Design optimization; Optimization methods; Permission; Semiconductor device modeling; Silicon; Transistors; Very large scale integration;
Conference_Titel :
Design Automation, 1987. 24th Conference on
Print_ISBN :
0-8186-0781-5
DOI :
10.1109/DAC.1987.203231
