DocumentCode :
450477
Title :
Force-Directed Scheduling in Automatic Data Path Synthesis
Author :
Paulin, P.G. ; Knight, J.P.
Author_Institution :
Bell-Northern Research, Ottawa, ONT.
fYear :
1987
fDate :
28-1 June 1987
Firstpage :
195
Lastpage :
202
Abstract :
The HAL system performs data path synthesis using a new scheduling algorithm that is part of an interdependent scheduling and allocation scheme. This scheme uses an estimate of the hardware allocation to guide and optimize the scheduling subtask. The allocation information includes the number, type, speed and cost of hardware modules as well as the associated multiplexer and interconnect costs. The iterative force-directed scheduling algorithm attempts to balance the distribution of operations that make use of the same hardware resources: * Every feasible control step assignment is evaluated at each iteration, for all operations. * The associated side-effects on all the predecessor and successor operations are taken into account. * All the decisions are global. * The algorithm has O(n2) complexity. We review and compare existing scheduling techniques. Moderate and difficult examples are used to illustrate the effectiveness of the approach.
Keywords :
Application specific integrated circuits; Automatic control; Costs; Hardware; Integrated circuit interconnections; Multiplexing; Permission; Processor scheduling; Scheduling algorithm; Size control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1987. 24th Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0781-5
Type :
conf
DOI :
10.1109/DAC.1987.203243
Filename :
1586227
Link To Document :
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