DocumentCode
450480
Title
A Practical Moat Router
Author
McGehee, Richard K.
Author_Institution
Seattle Silicon Corporation, Bellevue, WA
fYear
1987
fDate
28-1 June 1987
Firstpage
216
Lastpage
222
Abstract
The final step in the layout of integrated circuits involves connecting a central module to a surrounding ring of pads. Hence the region to be routed is in the shape of a moat. This paper presents a practical approach to the moat routing problem. The approach is based on an efficient channel routing algorithm with additional features addressing the characteristics of the moat configuration. While signal nets are similar to those of a channel router, power nets are routed in a single layer of metal. The geometry of the moat imposes some restrictions, but often allows additional compaction of the routes. Each side of the moat requires a different amount of space to complete the routing, and each side of the pad ring may be moved independently. This produces an asymmetrical moat, which minimizes chip area and guarantees 100 percent routing completion.
Keywords
Compaction; Distributed computing; Geometry; Integrated circuit layout; Joining processes; Permission; Routing; Shape; Silicon; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1987. 24th Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0781-5
Type
conf
DOI
10.1109/DAC.1987.203246
Filename
1586230
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