DocumentCode :
450494
Title :
KAHLUA: A Hierarchical Circuit Disassembler
Author :
Lin, Bo ; Newton, A. Richard
Author_Institution :
Electronics Research Laboratory, Department of Electrical Engineering and Computer Sciences, University of California Berkeley, CA
fYear :
1987
fDate :
28-1 June 1987
Firstpage :
311
Lastpage :
317
Abstract :
A new tool called a circuit disassembler has been developed to transform a mask level layout into an equivalent symbolic layout. This technique has been implemented in the program called KAHLUA that can handle mask layout containing arbitrary Manhattan geometry and is independent of the circuit technology. Circuits designed using physical layout systems can be automatically disassembled into a symbolic environment. Once converted, the disassembled cells can be manipulated further by any existing symbolic design or verification tools. In particular, these cells can be automatically remapped for a new technology. Our formulation of the problem consists of two major stages: device extraction, and net decomposition. In the first stage the transistors and contacts are extracted from the layout to form leaf cells. In the second stage a set of symbolic wires is derived from the remaining interconnect geometry. KAHLUA has been tested on a wide range of physical cells and has produced high quality results with modest execution times. An additional feature of the technique include the ability to disassemble hierarchically, which makes disassembling large layouts feasible.
Keywords :
Circuits; Geometry; Investments; Laboratories; Libraries; Microprocessors; Permission; Testing; Very large scale integration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1987. 24th Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0781-5
Type :
conf
DOI :
10.1109/DAC.1987.203260
Filename :
1586244
Link To Document :
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