Persistent Transactional Memory

Author

Zhaoguo Wang ; Han Yi ; Ran Liu ; Mingkai Dong ; Haibo Chen

Author_Institution

Shanghai Key Lab. of Scalable Comput. & Syst., Shanghai Jiao Tong Univ., Shanghai, China

Volume

14

Issue

1

fYear

2015

fDate

Jan.-June 1 2015

Firstpage

58

Lastpage

61

Abstract

This paper proposes persistent transactional memory (PTM), a new design that adds durability to transactional memory (TM) by incorporating with the emerging non-volatile memory (NVM). PTM dynamically tracks transactional updates to cache lines to ensure the ACI (atomicity, consistency and isolation) properties during cache flushes and leverages an undo log in NVM to ensure PTM can always consistently recover transactional data structures from a machine crash. This paper describes the PTM design based on Intel´s restricted transactional memory. A preliminary evaluation using a concurrent key/value store and a database with a cache-based simulator shows that the additional cache line flushes are small.

Keywords

cache storage; ACI properties; NVM; PTM design; cache line flushes; cache-based simulator; nonvolatile memory; persistent transactional memory; Batteries; Computer crashes; Data structures; Databases; Hardware; Nonvolatile memory; Registers; Hardware transactional memory; non-volatile random access memory;

fLanguage

English

Journal_Title

Computer Architecture Letters

Publisher

ieee

ISSN

1556-6056

Type

jour

DOI

10.1109/LCA.2014.2329832

Filename

6828760