DocumentCode :
450567
Title :
Performance of a Parallel Algorithm for Standard Cell Placement on the Intel Hypercube
Author :
Jones, Mark ; Jee, Prithviraj Baner
Author_Institution :
Computer Systems Group, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
fYear :
1987
fDate :
28-1 June 1987
Firstpage :
807
Lastpage :
813
Abstract :
In this paper, we present a parallel simulated annealing algorithm for standard cell placement that is targeted to run on the Intel Hypercube. We present a novel tree broadcasting strategy that is used extensively in our algorithm for updating cell locations in the parallel environment. Studies on the performance of our algorithm on example industrial circuits show that it is faster and gives better final placement results than the uniprocessor simulated annealing algorithms.
Keywords :
Circuit simulation; Computational modeling; Concurrent computing; Convergence; Hypercubes; Integrated circuit interconnections; Parallel algorithms; Partitioning algorithms; Permission; Simulated annealing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1987. 24th Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0781-5
Type :
conf
DOI :
10.1109/DAC.1987.203341
Filename :
1586325
Link To Document :
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