DocumentCode :
450615
Title :
Automatic Synthesis of Boolean Equations Using Programmable Array Logic
Author :
Goré, Rajeev P. ; Ramamohanarao, Kotagiri
Author_Institution :
Dept. of Computer Science, University of Melbourne, Parkville, Australia
fYear :
1989
fDate :
25-29 June 1989
Firstpage :
283
Lastpage :
289
Abstract :
We present a methodology and prototype system that automates the synthesis of combinational logic using Programmable Array Logic chips (PALs). (FOOTNOTE: PAL is a trademark of Monolithic Memories Inc.) The input is a set of boolean equations and a database of available PALs. The output is a set of equivalent equations, a set of chosen PALs and a mapping specifying which equations to implement on which PAL.
Keywords :
Automatic logic units; Boolean functions; Bridge circuits; Combinational circuits; Computer science; Equations; Logic devices; Permission; Pins; Programmable logic arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1989. 26th Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-310-8
Type :
conf
DOI :
10.1109/DAC.1989.203410
Filename :
1586394
Link To Document :
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