DocumentCode :
450636
Title :
A Neural Network Design for Circuit Partitioning
Author :
Yih, Jih-Shyr ; Mazumder, Pinaki
Author_Institution :
Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor, MI
fYear :
1989
fDate :
25-29 June 1989
Firstpage :
406
Lastpage :
411
Abstract :
This paper proposes a neural network model for circuit bipartitioning. The massive parallelism of neural nets has been successfully exploited to balance the partitions of a circuit and to reduce the external wiring between the partitions. The experimental results obtained by neural nets are found to be comparable with that achieved by Fiduccia and Mattheyses algorithm.
Keywords :
Artificial neural networks; Circuits; Clustering algorithms; Computer science; Neural networks; Neurons; Partitioning algorithms; Permission; Wires; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1989. 26th Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-310-8
Type :
conf
DOI :
10.1109/DAC.1989.203432
Filename :
1586416
Link To Document :
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