DocumentCode :
450714
Title :
DTR: A Defect-Tolerant Routing Algorithm
Author :
Pitaksanonkul, A. ; Thanawastien, S. ; Lursinsap, C. ; Gandhi, J.A.
Author_Institution :
The Center for Advanced Computer Studies, University of Southwestern Louisiana, Lafayette, LA
fYear :
1989
fDate :
25-29 June 1989
Firstpage :
795
Lastpage :
798
Abstract :
A new channel routing algorithm called DTR (Defect-Tolerant Routing) is investigated. This algorithm minimizes the total area and simultaneously maximizes the performance by reducing the critical area which can potentially be the source of logical faults caused by the bridging effects of spot defects. Experimental results show DTR produces less critical area than Yoshimura & Kuh´s algorithm [1].
Keywords :
Circuit faults; Distributed computing; Fabrication; Integrated circuit interconnections; Integrated circuit layout; Machinery; Permission; Routing; Very large scale integration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1989. 26th Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-310-8
Type :
conf
DOI :
10.1109/DAC.1989.203513
Filename :
1586497
Link To Document :
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