DocumentCode
450721
Title
Fast Online/Offline Netlist Compilation of Hierarchical Schematics
Author
Jones, Larry G.
Author_Institution
Computer Science Department, University of Illinois at Urbana-Champaign
fYear
1989
fDate
25-29 June 1989
Firstpage
822
Lastpage
825
Abstract
We present fast techniques for creating the netlist underlying a hierarchical schematic design. The methods can be used either for creating the netlist as a data structure for further online processing or for creating the netlist as a file for use with other offline design tools that are downstream from the compilation process. The methods we present have been used successfully in the implementation of a hierarchical schematic capture system that supports both netlist compilation and switch-level logic simulation.
Keywords
Circuits; Computer science; Data mining; Data structures; Design methodology; Distributed computing; Logic design; Permission; Pins; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1989. 26th Conference on
ISSN
0738-100X
Print_ISBN
0-89791-310-8
Type
conf
DOI
10.1109/DAC.1989.203520
Filename
1586504
Link To Document