Title :
Fast Online/Offline Netlist Compilation of Hierarchical Schematics
Author_Institution :
Computer Science Department, University of Illinois at Urbana-Champaign
Abstract :
We present fast techniques for creating the netlist underlying a hierarchical schematic design. The methods can be used either for creating the netlist as a data structure for further online processing or for creating the netlist as a file for use with other offline design tools that are downstream from the compilation process. The methods we present have been used successfully in the implementation of a hierarchical schematic capture system that supports both netlist compilation and switch-level logic simulation.
Keywords :
Circuits; Computer science; Data mining; Data structures; Design methodology; Distributed computing; Logic design; Permission; Pins; Timing;
Conference_Titel :
Design Automation, 1989. 26th Conference on
Print_ISBN :
0-89791-310-8
DOI :
10.1109/DAC.1989.203520