DocumentCode :
451113
Title :
Locality Optimizations for Multi-Level Caches
Author :
Rivera, Gabriel ; Tseng, Chau-Wen
Author_Institution :
University of Maryland
fYear :
1999
fDate :
13-18 Nov. 1999
Firstpage :
2
Lastpage :
2
Abstract :
Compiler transformations can significantly improve data locality of scientific programs. In this paper, we examine the impact of multi-level caches on data locality optimizations. We find nearly all the benefits can be achieved by simply targeting the L1 (primary) cache. Most locality transformations are unaffected because they improve reuse for all levels of the cache; however, some optimizations can be enhanced. Inter-variable padding can take advantage of modular arithmetic to eliminate conflict misses and preserve group reuse on multiple cache levels. Loop fusion can balance increasing group reuse for the L2 (secondary) cache at the expense of losing group reuse at the smaller L1 cache. Tiling for the L1 cache also exploits locality available in the L2 cache. Experiments show enhanced algorithms are able to reduce cache misses, but performance improvements are rarely significant. Our results indicate existing compiler optimizations are usually sufficient to achieve good performance for multi-level caches.
Keywords :
Arithmetic; Computer science; Data engineering; Delay; Educational institutions; Microprocessors; Optimizing compilers; Program processors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Supercomputing, ACM/IEEE 1999 Conference
Print_ISBN :
1-58113-091-0
Type :
conf
DOI :
10.1109/SC.1999.10063
Filename :
1592645
Link To Document :
بازگشت