DocumentCode
451866
Title
INCREDYBLE-TG: INCREmental DYnamic Test Generation Based on LEarning
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Electrical and Computer Engineering Department, University of Iowa, Iowa City, IA
fYear
1993
fDate
14-18 June 1993
Firstpage
80
Lastpage
85
Abstract
A new test generation approach is proposed for circuits having a a size parameter (e.g., operand size), that can be varied to obtain designs of different sizes. Under this approach, test generation is only performed for small versions of the target circuit, where test generation is fast and high-quality test sets can be obtained. The test sets for these small circuits are then studied, and analytical rules are derived to capture their common features. Finally, the rules derived are applied to obtain a high-quality test set for the large target circuit. The method, its feasibility and limitations are described in this work.
Keywords
Circuit faults; Circuit synthesis; Circuit testing; Cities and towns; Design engineering; Electrical fault detection; Performance evaluation; Process design; Sequential analysis; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1993. 30th Conference on
ISSN
0738-100X
Print_ISBN
0-89791-577-1
Type
conf
DOI
10.1109/DAC.1993.203923
Filename
1600196
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