Partial Scan with Retiming

A generally effective approach to the partial scan problem is to select flip-flops that break the cyclic structure of the circuit. A large number of techniques are based on this framework, but they are all static, in the sense that the flip-flops remain fixed on their original positions. In this paper, we present a method that rearranges the D flip-flops of a synchronous sequential circuit by retiming, so that the overhead of partial scan is minimized. Experiments on ISCAS´89 circuits show that retiming improves significantly both non-timing-driven and timing-driven partial scan.