DocumentCode :
451909
Title :
InSyn: Integrated Scheduling for DSP Applications
Author :
Sharma, Alok ; Jain, Rajiv
Author_Institution :
Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI
fYear :
1993
fDate :
14-18 June 1993
Firstpage :
349
Lastpage :
354
Abstract :
In this paper, we present the InSyn, an integrated allocation and scheduling approach for high-level synthesis applications. The scheduler considers functional units, busses and registers while performing time-step assignment. The results show that incorporating all these features during scheduling can produce very good designs.
Keywords :
Algorithm design and analysis; Application software; Costs; Delay; Digital signal processing; Hardware; High level synthesis; Processor scheduling; Registers; Scheduling algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1993. 30th Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-577-1
Type :
conf
DOI :
10.1109/DAC.1993.203973
Filename :
1600246
Link To Document :
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