Improved Techniques for Probabilistic Simulation Including Signal Correlation Effects

Probabilistic simulation has been shown to be a very cost-effective approach to the computation of voltage and current waveform statistics in CMOS digital circuits, compared to exhaustive simulation. This approach is particularly attractive when long-term reliability issues such as electromigration, hot-carrier effects, and average power, are to be estimated over all possible input signals. In this paper we present new algorithms for performing probabilistic simulation that provide significant improvements over existing ones, both in accuracy and speed. The improvements are carried out at the subcircuit level, where the statistics of the current and voltage waveforms and the delays are computed more accurately, and at the global level, where signal correlations are considered. The new algorithms have been implemented in a computer program and tested on a number of large benchmark circuits.