DocumentCode
451921
Title
An Approach for Redesigning in Data Path Synthesis
Author
Papachristou, Christos ; Harmanani, Haidar ; Nourani, Mehrdad
Author_Institution
Department of Computer Engineering, Case Western Reserve University, Cleveland, OH
fYear
1993
fDate
14-18 June 1993
Firstpage
419
Lastpage
423
Abstract
A new method of redesign at the register-transfer level using a transformational process is proposed. The redesign approach takes into consideration ALU and interconnect cost in addition to layout area estimation. The idea is to start with a design, possibly generated by a synthesis system, and iteratively improve it by means of a reallocation process. The method is based on a set of reallocation transformations along with systematic strategies as to how to apply them together with a layout estimation model.
Keywords
Automatic generation control; Computational complexity; Constraint optimization; Control system synthesis; Costs; High level synthesis; Processor scheduling; Resource management; Routing; Silicon compiler;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1993. 30th Conference on
ISSN
0738-100X
Print_ISBN
0-89791-577-1
Type
conf
DOI
10.1109/DAC.1993.203985
Filename
1600258
Link To Document