DocumentCode :
452028
Title :
Placement and Routing for a Field Programmable Multi-Chip Module
Author :
Lan, Sanko ; Ziv, Avi ; Gamal, Abbas El
Author_Institution :
Information Systems Laboratory, Stanford University, Stanford, CA
fYear :
1994
fDate :
6-10 June 1994
Firstpage :
295
Lastpage :
300
Abstract :
Placement and routing heuristics for a Field Programmable Multi-Chip Module (FPMCM) are presented. The placement is done in three phases; partitioning, chip assignment and iterative improvement. The routing is done in two phases; global routing followed by detailed routing. Detailed routing involves new channel routing problems denoted by Exact Segmented Channel Routing (ESCR) and K-ESCR. A very fast K-ESCR heuristic is described. Experimental results show that the placement heuristic achieves high gate utilization, and that the K-ESCR heuristic performs surprisingly well over wide range of channel sizes.
Keywords :
Costs; Field programmable gate arrays; Joining processes; Pins; Random access memory; Routing; Simulated annealing; Switches; Wires; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1994. 31st Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-653-0
Type :
conf
DOI :
10.1109/DAC.1994.204115
Filename :
1600388
Link To Document :
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