Title :
On Testing Wave Pipelined Circuits
Author :
Shyur, Jui-Ching ; Chen, Hung-Pin ; Parng, Tai-Ming
Author_Institution :
Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.0.C.
Abstract :
We present currently the first approach to test wave pipelined circuits. Wave faults are identified and well modeled. The fault coverage is obtained by statistics and fault probabilities. We also present the robust wave test, and give a TG algorithm, by testing wave pipelined and ISCAS combinational circuits, capable of reaching on average 85.8% fault coverage.
Keywords :
Circuit testing;
Conference_Titel :
Design Automation, 1994. 31st Conference on
Print_ISBN :
0-89791-653-0
DOI :
10.1109/DAC.1994.204128