• DocumentCode
    452073
  • Title

    Area-EfficientFault Detection During Self-Recovering Microarchitecture Synthesis

  • Author

    Karri, Ramesh ; Orailoglu, Alex

  • Author_Institution
    Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, Amherst, MA
  • fYear
    1994
  • fDate
    6-10 June 1994
  • Firstpage
    552
  • Lastpage
    556
  • Abstract
    We will present the area-efficient fault-detection synthesis component of SYNCERE, an integrated system for synthesizing area-efficient self-recovering microarchitectures. In the SYNCERE model for self-recovery, transient fault detection is based on duplication and comparison, while recovery from transient faults is accomplished via checkpointing and rollback. SYNCERE minimizes the overhead of duplication using two complementary area-optimization techniques. Whereas imposing inter-copy hardware disjointness at a sub-computation level instead of at the overall computation level ameliorates the dedicated hardware required for the original and duplicate computations, restructuring the pliable input representation of the duplicate computation further moderates the overall hardware.
  • Keywords
    Checkpointing; Clocks; Electrical fault detection; Fault detection; Hardware; Microarchitecture; Military computing; Scheduling; Testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1994. 31st Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-89791-653-0
  • Type

    conf

  • DOI
    10.1109/DAC.1994.204164
  • Filename
    1600437