DocumentCode :
452092
Title :
Permissible Observability Relations in FSM Networks
Author :
Wang, Huey-Yih ; Brayton, Robert K.
Author_Institution :
Department of EECS, University of California, Berkeley, CA
fYear :
1994
fDate :
6-10 June 1994
Firstpage :
677
Lastpage :
683
Abstract :
Previous attempts to capture the phenomenon of output don´t care sequences for a component in an FSM network have been incomplete. We demonstrate that output don´t care sequences for a component can be expressed using a set of observability relations given that its state transition function is kept unchanged. Each observability relation is permissible in the sense that any implementation compatible with one of them is feasible. The representation for a set of permissible observability relations is not unique. We provide a method to find a set with the minimum number of permissible relations. We briefly discuss the exploitation of permissible observability relations in state minimization, circuit implementation and signal encoding. We have implemented these methods and present some preliminary results on a few small artificially constructed examples.
Keywords :
Circuit synthesis; Combinational circuits; Contracts; Encoding; Intelligent networks; Logic circuits; Minimization; Network synthesis; Observability; Sequential circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1994. 31st Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-653-0
Type :
conf
DOI :
10.1109/DAC.1994.204188
Filename :
1600461
Link To Document :
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