Crosstalk Test Pattern Generation for Dynamic Programmable Logic Arrays

Author

Liu, J. ; Jone, W.B. ; Das, S.R.

Author_Institution

Dept. of ECECS, Cincinnati Univ., OH

Volume

1

fYear

2005

fDate

16-19 May 2005

Firstpage

55

Lastpage

60

Abstract

In modern deep sub-micron (DSM) circuits, signal crosstalk can arise between two long parallel wires. Dynamic programmable logic arrays (PLAs) may suffer crosstalk noises that will cause the circuit to malfunction due to charge loss. In this paper, based on the characteristics of dynamic PLA crosstalk noises, we present an automatic test pattern generation (ATPG) method to detect the maximum crosstalk noise for each product line. Experimental results obtained by simulating MCNC PLA benchmark circuits demonstrate the efficiency of the ATPG and method

Keywords

automatic test pattern generation; crosstalk; integrated circuit noise; integrated circuit testing; logic testing; programmable logic arrays; automatic test pattern generation; charge loss; crosstalk noises; crosstalk test pattern generation; deep sub-micron circuits; dynamic programmable logic arrays; long parallel wires; signal crosstalk; signal integrity; Automatic test pattern generation; Circuit faults; Circuit noise; Circuit testing; Clocks; Crosstalk; Logic arrays; Logic testing; Programmable logic arrays; Test pattern generators; Dynamic PLA; automatic test pattern generation; crosstalk noise; signal integrity; test compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 2005. IMTC 2005. Proceedings of the IEEE

Conference_Location

Ottawa, Ont.

Print_ISBN

0-7803-8879-8

Type

conf

DOI

10.1109/IMTC.2005.1604067

Filename

1604067