Embedded Test Resource to Reduce the Required Memory and Channels of Tester

Author

Han, Yinhe ; Hu, Yu ; Li, Huawei ; Li, Xiaowei

Author_Institution

Inst. of Comput. Technol., Chinese Acad. of Sci., Beijing

Volume

1

fYear

2005

fDate

16-19 May 2005

Firstpage

190

Lastpage

195

Abstract

An embedded test stimulus decompressor is presented to generate the test patterns, which can reduce the required vector memory and channels of automatic test equipment (ATE). The decompressor consists of a periodically alterable MUX network which has multiple configurations to decode the input information flexibly. A complete synthesis flow is presented to generate the MUXs network automatically. With the dedicated efforts, the low-cost ATE with low data bandwidth can be used to test the system-on-a-chip with high complexity

Keywords

automatic test equipment; automatic test pattern generation; embedded systems; integrated circuit testing; microprocessor chips; system-on-chip; MUX network; automatic test equipment; embedded test resource; embedded test stimulus decompressor; required vector memory reduction; system-on-a-chip testing; test pattern generation; tester channels; Automatic testing; Bandwidth; Circuit testing; Computers; Costs; Decoding; Genetic mutations; Pins; System testing; System-on-a-chip; Automatic Test Equipment; MUXs Network; Test Stimulus Decompressor;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 2005. IMTC 2005. Proceedings of the IEEE

Conference_Location

Ottawa, Ont.

Print_ISBN

0-7803-8879-8

Type

conf

DOI

10.1109/IMTC.2005.1604097

Filename

1604097