Software Development Environment for Run-time Reconfigurable System-on-Chip

Author

Groza, Voicu ; El-Kadri, Mohammad ; Fu, Peng

Author_Institution

Sch. of Inf. of Technol. & Eng., Ottawa Univ., Ont.

Volume

1

fYear

2005

fDate

16-19 May 2005

Firstpage

327

Lastpage

331

Abstract

This paper gives an overview of an innovative architecture for a run-time reconfigurable co-processor that could be used for rapid system prototyping. The user makes use of our application modeling language named PACO in order to fully exploit the features of the platform. Also, in further detail, we discuss our just-in-time (JIT) compiler that prepares the user application to be executed partly on a soft-core processor and partly on a run-time reconfigurable processing unit (RPU). The JIT compiler decides which portions of the code could execute faster in hardware (i.e. on the RPU) and which should execute in software. This will drastically improve the execution time of computationally intensive algorithms

Keywords

circuit CAD; electronic engineering computing; logic design; microprocessor chips; program compilers; reconfigurable architectures; system-on-chip; PACO; application modeling language; just-in-time compiler; rapid system prototyping; run-time reconfigurable coprocessor; run-time reconfigurable processing unit; run-time reconfigurable system-on-chip; software development environment; Application software; Computer architecture; Hardware; Instruments; Mathematical model; Power engineering computing; Programming; Runtime environment; System-on-a-chip; Unified modeling language;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 2005. IMTC 2005. Proceedings of the IEEE

Conference_Location

Ottawa, Ont.

Print_ISBN

0-7803-8879-8

Type

conf

DOI

10.1109/IMTC.2005.1604127

Filename

1604127