Development Platform for Floating-Point Analog-to-Digital Converters

The floating-point analog-to-digital converter (FPADC) is an extended version of the fixed-point ADC being designed to deal with a broader dynamic range of signals while exhibiting a smaller relative quantization error. Since the FPADC is characterized by a high relative precision, it requires high-precision high-speed components. The cost of these high precision high-speed components limits the availability of FPADCs to high-priced designs. Several architectures of floating-point analog-to-digital converters (FPADC) were reported in the last years (Yang et al., 1999). Since FPADCs are usually tailored for specific applications, and since their design is a highly resource consuming process, there is a need for a flexible development platform. An emulator platform, described in this paper, been conceived and built for the emulation of this class of ADC´s. This development environment allows for the tuning of the FP-ADC architectures and their parameters before starting the design process, such they best fit envisaged applications. This paper presents the complete architecture and the implementation of this hardware/software development environment for FP-ADCs