A 32 GSample/sec SiGe HBT comparator for ultra-high-speed analog-to-digital conversion

This paper presents a monolithic master-slave comparator in an ECL configuration with series-gating for ultra-high-speed medium-resolution analog-to-digital conversion. Implemented in a 200 GHz SiGe HBT technology, the complete chip die, including bondpads, is 1.731 × 1.141 mm², with the comparator occupying only 0.0226 mm² when integrated as part of an ADC. It dissipates a total of 405 mW from a 3.5 V power supply. Operating with an input frequency of 5 GHz, the circuit can oversample up to 32 GS/s, with input sensitivity ranging from 5 mV_pp at 15 GS/s to 37 mV_pp at 32 GS/s. Operating at Nyquist, the comparator can sample up to 30 GS/s, with input sensitivity ranging from 12 mV_pp at 20 GS/s to 30 mV_pp at 30 GS/s. To our knowledge, this comparator achieves the best input sensitivity-sampling rate combination when compared with other standalone comparators in literature.