DocumentCode
453120
Title
5 GHz 0.25-μm CMOS static frequency divider
Author
Ding, Jingfeng ; Wang, Zhigong ; Qiu, Yinghua ; Wang, Gui ; Zhu, En
Author_Institution
Southeast Univ., Nanjing, China
Volume
2
fYear
2005
fDate
4-7 Dec. 2005
Abstract
A 5 GHz 2:1 static frequency divider IC was realized in a 0.25-μ mixed-signal CMOS technology with an fT of 18.6 GHz. The divider is based on a master-slave toggle flip-flop (MSTFF) of source coupled FET logic (SCFL) and a wide band output buffer. The basic circuits and layout strategies to achieve low jitter and high speed are discussed. The measured rms jitter of the output waveform is 1.38 ps at 5 GHz input. The core power dissipation is 5 mW under a 2.5V supply.
Keywords
CMOS integrated circuits; field effect logic circuits; flip-flops; frequency dividers; integrated circuit layout; 0.25 micron; 18.6 GHz; 2.5 V; 5 GHz; 5 mW; CMOS technology; frequency divider IC; master-slave toggle flip-flop; source coupled FET logic; CMOS integrated circuits; CMOS logic circuits; CMOS technology; Coupling circuits; FETs; Flip-flops; Frequency conversion; Jitter; Master-slave; Wideband; CMOS; Frequency divider; Jitter; Latch;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference Proceedings, 2005. APMC 2005. Asia-Pacific Conference Proceedings
Print_ISBN
0-7803-9433-X
Type
conf
DOI
10.1109/APMC.2005.1606453
Filename
1606453
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