The TinyCAN: an optimized CAN controller IP for FPGA-based platforms

Author

Carvalho, Fabiano C. ; Jansch-Pôrto, Ingrid ; Freitas, Dison P. ; Pereira, Carlos E.

Author_Institution

Comput. Sci. Inst., Univ. Fed. do Rio Grande do Sul, Porto Alegre

Volume

1

fYear

2005

fDate

19-22 Sept. 2005

Lastpage

374

Abstract

This paper presents the TinyCAN, a resource constrained controller area network controller implemented in VHDL language. The core description is fully synthesizable and fits in a FPGA-based platform occupying a maximum of 366 look-up tables. An enhanced error control strategy was elaborated with the aim of producing a more suitable behavior for safety-critical applications. For all that, compatibility with off-the-shelf components was preserved implementation details and comments on design decisions are given. The paper also presents some guidelines for the use of the proposed CAN controller IP for time-triggered architectures

Keywords

IP networks; controller area networks; field programmable gate arrays; hardware description languages; CAN; FPGA-based platform; IP network; VHDL; error control strategy; hardware description language; look-up table; resource constrained controller area network controller; safety-critical application; time-triggered architecture; Communication system control; Computer science; Embedded system; Field programmable gate arrays; Guidelines; Hardware design languages; ISO standards; Network synthesis; Protocols; Prototypes;

fLanguage

English

Publisher

ieee

Conference_Titel

Emerging Technologies and Factory Automation, 2005. ETFA 2005. 10th IEEE Conference on

Conference_Location

Catania

Print_ISBN

0-7803-9401-1

Type

conf

DOI

10.1109/ETFA.2005.1612547

Filename

1612547