Title :
Test Set Enrichment using a Probabilistic Fault Model and the Theory of Output Deviations
Author :
Zhanglei Wang ; Chakrabarty, Krishnendu ; Goessel, M.
Author_Institution :
Dept. Electr. & Comput. Eng., Duke Univ., Durham, NC
Abstract :
We present a probabilistic fault model that allows any number of gates in an integrated circuit to fail probabilistically. Tests for this fault model, determined using the theory of output deviations, can be used to supplement tests for classical fault models, thereby increasing test quality and reducing the probability of test escape. Output deviations can also be used for test selection, whereby the most effective test patterns can be selected from large test sets during time-constrained and high-volume production testing. Experimental results are presented to evaluate the effectiveness of patterns with high output deviations for the single stuck-at and bridging fault models
Keywords :
automatic test pattern generation; fault simulation; integrated circuit design; integrated circuit testing; probability; production testing; integrated circuit; output deviations; probabilistic failure; probabilistic fault model; production testing; test patterns; test set enrichment; Circuit faults; Circuit testing; Computer science; Electronic mail; High K dielectric materials; Integrated circuit modeling; Integrated circuit technology; Logic gates; Production; Redundancy;
Conference_Titel :
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location :
Munich
Print_ISBN :
3-9810801-1-4
DOI :
10.1109/DATE.2006.244099