Sign Bit Chip Correlation MMSE Receiver with Multipath Interference Correlative Timing for DS-CDMA Systems

This paper proposes a sign bit chip correlation MMSE receiver with multipath interference correlative timing or sign bit CCMRM for downlink direct sequence code division multiple access (DS-CDMA). The proposed method significantly reduces the associated complexity without degrading the BER performance by using sign bit chip correlation and appropriate compensation for the elements of the sign bit chip correlation matrix. Our estimations have shown that the complexity of the method proposed for the W-CDMA receiver is about 1/8 that of normal CCMRM