DocumentCode :
456682
Title :
A New and Efficient Field-Partition Based Code Compression and Its Pipelined Decompression System
Author :
Jeang, Yuan-Long ; Tai, Chih-Chung ; Lin, Yong-Zong
Author_Institution :
Dept. of Inf. Eng., Kun Shan Univ., Tainan
Volume :
2
fYear :
2006
fDate :
Aug. 30 2006-Sept. 1 2006
Firstpage :
10
Lastpage :
13
Abstract :
A field partition based instruction compression/decompression system for ARM series architecture is proposed. We could get a statistics of the appearances of each field in all instructions of a program. Depending on the statistics, we partition each instruction into three fields and compress each field using Huffman coding method. Experimental results show that our method is better than others with a 55% of average compression ratio. For decompression, single buffering, double buffering and pipeline techniques have been proposed. However, due to jump penalty, these techniques incur more delays in pipeline or have to stop and fill in the cache buffers. We proposed a pipeline with back-up for flushing technique that incurs no delay and without stopping due to jump. The average performance is increased about 10% to 60%
Keywords :
Huffman codes; cache storage; data compression; parallel architectures; pipeline processing; reduced instruction set computing; ARM series architecture; Huffman coding method; cache buffers; field partition based instruction compression system; field-partition based code compression; field-partition based instruction decompression system; pipelined decompression system; Costs; Data compression; Delay; Energy consumption; Huffman coding; Manufacturing processes; Pipelines; Reduced instruction set computing; Statistics; Thumb;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Innovative Computing, Information and Control, 2006. ICICIC '06. First International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7695-2616-0
Type :
conf
DOI :
10.1109/ICICIC.2006.206
Filename :
1691916
Link To Document :
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