• DocumentCode
    45794
  • Title

    Transient Electrical-Thermal Analysis of 3-D Power Distribution Network With FETI-Enabled Parallel Computing

  • Author

    Tianjian Lu ; Jian-Ming Jin

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Champaign, IL, USA
  • Volume
    4
  • Issue
    10
  • fYear
    2014
  • fDate
    Oct. 2014
  • Firstpage
    1684
  • Lastpage
    1695
  • Abstract
    In this paper, the transient electrical-thermal co-simulation is implemented with the finite-element method. The capability of the co-simulation is extended to solve large-scale problems by incorporating a domain decomposition scheme called the finite element tearing and interconnecting (FETI). With the high parallel efficiency of FETI for computing with multiple processors, a significant reduction in computation time is achieved. The transient electrical-thermal behaviors of largescale power distribution networks (PDNs), including on-chip power grids, solder bump arrays, and TSV-based PDN are simulated and analyzed with the proposed method. The impacts on the design of the PDNs from different types of input pulses, power maps, and via pitches are also investigated.
  • Keywords
    electronic engineering computing; finite element analysis; integrated circuit interconnections; power grids; solders; thermal analysis; three-dimensional integrated circuits; transient analysis; 3D power distribution network; FETI-enabled parallel computing; TSV-based PDN; computation time; domain decomposition scheme; finite element method; finite element tearing and interconnecting; on-chip power grids; power maps; solder bump arrays; transient electrical-thermal analysis; transient electrical-thermal behaviors; transient electrical-thermal cosimulation; via pitches; Conductivity; Equations; Finite element analysis; Metals; Power grids; System-on-chip; Transient analysis; 3-D power distribution network (PDN); domain decomposition; electrical–thermal co-simulation; electrical-thermal co-simulation; finite-element method (FEM); through-silicon via (TSV);
  • fLanguage
    English
  • Journal_Title
    Components, Packaging and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    2156-3950
  • Type

    jour

  • DOI
    10.1109/TCPMT.2014.2345651
  • Filename
    6883144