Title :
Enhanced Low-Density Parity-Check Codes Based on Sum-check Blocks
Author :
Lin, Jingli ; Jing, Longjiang ; Zhu, Weile ; Yang, Chen
Author_Institution :
Sch. of Electron. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu
Abstract :
Based on some characteristics of decoding and error-floors of low-density parity-check (LDPC) codes, an approach of adding sum-check blocks to original LDPC blocks over GF(2) is proposed. The performance of this approach is analyzed and the circuits are also presented. Also, the simulation results show that the performance of the constructed LDPC codes can be improved significantly with low cost, as the block error probability (BEP) drops
Keywords :
Galois fields; block codes; decoding; error statistics; parity check codes; BEP; GF(2); block error probability; decoding; enhanced LDPC codes; error-floor; low-density parity-check codes; sum-check block; AWGN; Automation; Circuit analysis; Circuit simulation; Data engineering; Iterative decoding; Mechanical engineering; Modulation coding; Parity check codes; Performance analysis;
Conference_Titel :
Communications, Circuits and Systems Proceedings, 2006 International Conference on
Conference_Location :
Guilin
Print_ISBN :
0-7803-9584-0
Electronic_ISBN :
0-7803-9585-9
DOI :
10.1109/ICCCAS.2006.284759
