A Flexible FPGA-based Video Compression System and Its Testing Interface

Author

Wang, Rui ; Jiang, Hongxu ; Li, Qiujie ; Li, Bo ; Zen, Yifang

Author_Institution

Dept. of Comput. Sci. & Eng., BeiHang Univ., Beijing

Volume

1

fYear

2006

fDate

16-20 2006

Abstract

This paper presents a FPGA-based video compression system (FVCS) and its testing interface system (TIS). The FVCS is designed in order to implement complex algorithms such as MPEG-4. TIS is implemented to facilitate functions´ development. A high-end FPGA from Xilinx´s Vertex-4 series has been used to perform the functions including video acquisition, compression and bit-stream transmission. FVCS implements an open architecture with a separate video lens module and can connect an optional extend memory system. Two compression solutions based on FVCS´s architecture demonstrate the flexibility

Keywords

data acquisition; data compression; field programmable gate arrays; video coding; MPEG-4; Xilinx Vertex-4 series; bit-stream transmission; flexible FPGA-based video compression system; open architecture; optional extend memory system; testing interface system; video acquisition; video lens module; Application specific integrated circuits; Cameras; Computer architecture; Computer displays; Computerized monitoring; Field programmable gate arrays; Lenses; MPEG 4 Standard; System testing; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing, 2006 8th International Conference on

Conference_Location

Beijing

Print_ISBN

0-7803-9736-3

Electronic_ISBN

0-7803-9736-3

Type

conf

DOI

10.1109/ICOSP.2006.345485

Filename

4128898