An memory-efficient variable length decoding scheme for embedded MPEG-4 video decoders

Variable length decoding (VLD) is inherent bit-serial operation and is the first stage of the whole video decoding task, the overall decoding system performance is determined by its throughput and efficiency. In this paper, a scheme for decoding of discrete cosine transform (DCT) coefficients is presented The DCT VLD tables are split into two different tables: the one with 0-3 leading zeros and the other with 4 or more leading zeros. The proposed VLD tables need less than 6K bytes memory space, and the decoding procedures are completed by applying numerical properties to codewords identification and symbol indexing. Compared with the direct indexing method, not only the memory space is reduced for symbol information, but also the code efficiency is improved by enabling compiling code with near mode. Experimental results show that the proposed solution can improve the VLD speed by 17-43%. This VLD method has been integrated into the developed embedded MPEG-4 video decoder successfully