An ASIC circuit for timing measurements with strip detectors, designed for the SiliPET project

In this work we propose a single channel prototype for an ASIC circuit which will be used as the analog front end for the SiliPET project. The aim of the project is the development of a new PET imager based entirely on silicon detectors, for small animal imaging applications. The system will detect the Compton interactions of the gamma photons in silicon and will be based on several stacks of Double Sided Silicon strip Detectors (DSSD) with an active area of 3 times 3 cm², a thickness of 1.5 mm and 128 micro strips on each side. Considering that the application is the PET, the front end electronic should minimize the time jitter as possible, in order to reduce the number of false coincidences and improve the image quality. A typical filtering, in presence of a wide range of signal amplitudes as in the case of Compton interactions, is the bipolar semi Gaussian filtering, which is insensitive to the amplitude walk. However it is necessary to take into account that this filtering is quite sensitive to the jitter in the charge collection time inside the detector, which is of the order of 10 ns. Basing on simulations, we considered a fast unipolar filter, based on the CRRC shaping, consisting of a fast rise time and of a slower decay time. In the paper we present the simulations used for evaluating the expected time jitter of the system and we describe the design of a single channel circuit, built in AMS 0.35 mum CMOS technology, which is a first single channel circuit, in view of a prototype of the 128-channel chip.