Implantable Bio system design for displacement measurement of living life

With the increase advanced age population, the number of patients related to cardiac disorder and diabetes also increases with the same ratio. Therefore, the overall burden related to medical expense for these problems increases as well. For this purpose, a way to implant a small and low power heart pulsation blood sugar treatment system was proposed. In this paper, we discuss an implementation of one chip for living body electric potential measurement for heart pulsation blood sugar treatment system. We used Verilog HDL for an RTL design. For ASIC we used Synopsys Design Compiler and TSMC 0.18 mum Library to synthesize and generate netlist and sdf files, and finally performed the timing simulation using Cadence´s NC-Verilog. The operating frequency of the whole SOC system is 10 kHz and the number of gates is 66,199.