Optimization and Comparison of Computational Complexities of Standard Compliant Video Decoders on SIMD Processor

The intrinsic nature of multimedia applications has been targeted for exploiting single-instruction, multiple-data (SIMD) extensions to instruction architectures for most of the embedded processors. In particular, SIMD instructions can be most effective in multimedia applications, which have simple operations on multiple and small data types, mostly 8-bit or 16-bit samples. In this paper, optimization and comparison of computational complexities of standard video decoders has been done using the Intel Wireless MMX technology, to show the overall speedup by SIMD style coding.