Title :
Flexible and Cost Effective Transport Stream Processor for DTV
Author :
Tsai, Chia-Liang ; Chien, Shao-Yi
Author_Institution :
Dept. of Electr. Eng., National Taiwan Univ., Taipei
Abstract :
A flexible transport stream processor for DTV which is also designed under cost-effective consideration is proposed in this paper. A RISC micro-controller is allocated as the core of transport stream processor for flexibly extending or changing the functions of the transport stream processor. For the consideration of cost-effective design, the functions of the transport stream processor are partitioned into ones which are suitable for hardware implementation and the others suitable for the software executed by the micro-controller. Special enhancement of the instruction set of the micro-controller is proposed, with which the code efficiency of bit-level data-field processing could be improved. A general parsing engine for parsing grouping data-fields is also proposed. With the features described above, about 50% of total cost of transport stream processor with baseline functions can be saved.
Keywords :
digital television; microcontrollers; reduced instruction set computing; DTV; RISC microcontroller; code efficiency; data-field processing; general parsing engine; instruction set; transport stream processor; Application software; Computer architecture; Cost function; Design engineering; Digital TV; Filtering; Hardware; Reduced instruction set computing; Streaming media; TV broadcasting;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.378203