Title :
An Energy-Efficient Dual-Edge Triggered Level-Converting Flip-Flop
Author :
Chiou, Lih-Yih ; Lou, Shien-Chun
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan
Abstract :
In this paper, we propose a dual-edge triggered and dual-Vth level converting flip-flop (LCFF). The LCFF utilizes many energy-saving features that can be used in a multi-Vdd and multi-Vth system. A novel power-aware latch structure is designed to eliminate the internal power during transition. When operated in sleep mode, the power-aware latch is switch to low-leakage mode and still retain its data. Experimental results show that the proposed LCFF has the lowest PDP among compared FFs.
Keywords :
flip-flops; trigger circuits; dual-edge triggering; level-converting flip-flop; low-leakage mode; power-aware latch structure; Circuits; Clocks; Delay; Energy consumption; Energy efficiency; Flip-flops; Frequency; Latches; Low voltage; Threshold voltage;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.378255
