Energy-Efficient Double-Binary Tail-Biting Turbo Decoder Based on Border Metric Encoding

Author

Kim, Ji-Hoon ; Park, In-Cheol

Author_Institution

Dept. of EE, Korea Adv. Inst. of Sci. & Technol., Daejeon

fYear

2007

fDate

27-30 May 2007

Firstpage

1325

Lastpage

1328

Abstract

This paper presents an energy-efficient turbo decoder based on border metric encoding, which is especially suitable for non-binary circular turbo codes. In the proposed method, the size of the branch memory is reduced to half and the dummy calculation is removed at the cost of a small-sized memory that holds encoded border metrics. Due to the small size and infrequent access to the border memory, power consumption for soft-input soft-output (SISO) decoding is reduced by 26.0%. Based on the proposed SISO decoder and the dedicated hardware interleaver, a double-binary tail-biting turbo decoder is designed for WiMAX standard using a 0.18 mum CMOS process and it can support 12.14Mbps at operating frequency of 100MHz.

Keywords

CMOS integrated circuits; WiMax; codecs; low-power electronics; turbo codes; 0.18 micron; 100 MHz; 12.14 Mbit/s; CMOS process; WiMAX standard; border memory; border metric encoding; double-binary tail-biting turbo decoder; hardware interleaver; nonbinary circular turbo codes; soft-input soft-output decoding; CMOS process; Costs; Decoding; Encoding; Energy consumption; Energy efficiency; Frequency; Hardware; Turbo codes; WiMAX;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378416

Filename

4252891