An Improved Frame-Level Pipelined Architecture for High Resolution Video Motion Estimation

Frame-level pipelined motion estimation structure achieves high throughput by exploiting the explicit parallelism among motion estimation blocks. In this paper, an improved frame-level pipelined architecture for FSBM motion estimation is proposed. The design efforts are focused on reducing the size of internal data buffers and the hardware overheads for high resolution video motion estimation. Compared with previous high performance architectures, the proposed architecture employs the smallest number of data buffers as well as removes the data broadcasting operations and keeps nearly 100% fully pipelined computation. As a result, this architecture offers a feasible solution for SHDTV video pictures.