A Sub-1V Low Power Temperature Compensated Current Reference

Author

Olmos, Alfredo ; Boas, Andre Vilas ; Soldera, Jefferson

Author_Institution

Freescale Semicond., Brazil Semicond. Technol. Center

fYear

2007

fDate

27-30 May 2007

Firstpage

2164

Lastpage

2167

Abstract

The design of an all-MOS low-power low-voltage temperature compensated current reference is described. Design equations take into account current as the main variable and it is based on the concept of inversion level. The proposed circuit can be adjusted to behave as PTAT or ZTAT. The circuit has been integrated in a 0.25mum standard CMOS process and occupies an area of 0.018mm². The current reference has been also simulated in a 90nm CMOS technology. Lowest voltage operation reported is 1.2V in 0.25mum and 0.9V in 90nm processes. In both technologies the temperature variation is within plusmn5% from -40degC to 150degC. Simulation results indicate that to generate a 500pA current the circuit would dissipate 10nW at 1V supply voltage.

Keywords

CMOS integrated circuits; compensation; low-power electronics; reference circuits; -40 to 150 C; 0.25 micron; 0.9 V; 1.2 V; 10 nW; 50 pA; 90 nm; CMOS process; all-MOS current reference; low power temperature compensation; CMOS process; CMOS technology; Circuit simulation; Integrated circuit technology; Low voltage; MOSFET circuits; Operational amplifiers; Resistors; Silicon; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378602

Filename

4253100