DocumentCode :
464955
Title :
Simplified Low-Voltage CMOS Syllabic Companding Log Domain Filter
Author :
Akita, Ippei ; Wada, Kazuyuki ; Tadokoro, Yoshiaki
Author_Institution :
Graduate Sch. of Eng., Toyohashi Univ. of Technol.
fYear :
2007
fDate :
27-30 May 2007
Firstpage :
2244
Lastpage :
2247
Abstract :
This paper proposes a low-voltage syllabic companding log domain filter without state variable correction circuits, which is needed for externally linear and time-invariant operation of conventional filters. The proposed filter is simplified and has wide input range under low-supply voltage by varying a nodal voltage adaptively. The simulation results show 60-dB input range for over 40-dB signal to noise plus distortion ratio at a power supply of 0.6 V in a 0.18-mum CMOS process.
Keywords :
CMOS analogue integrated circuits; filters; low-power electronics; 0.18 micron; 0.6 V; CMOS process; low-voltage CMOS; syllabic companding log domain filter; Adaptive filters; CMOS process; Circuit noise; Circuit simulation; Distortion; Nonlinear filters; Power supplies; Signal processing; Signal to noise ratio; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
Type :
conf
DOI :
10.1109/ISCAS.2007.378729
Filename :
4253120
Link To Document :
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