A Nanowatt Successive Approximation ADC with Offset Correction for Implantable Sensor Applications

An 8-bit successive approximation analog-to-digital converter (ADC) with offset correction circuitry is presented for implantable sensor applications. The ADC is designed in a 0.13mum CMOS process technology and operates with voltage supplies down to 0.35 V using MOSFETs operating in their sub-threshold region of operation. Sample rates of 60kS/s are achieved with an INL and DNL of approximately 0.26LSB and 0.35LSB respectively. The SAR ADC achieves 10.7pJ/cycle operating at 20 kS/s with a 0.4 V supply. An offset correction circuit is included to dynamically minimize the offset voltage on the comparator.