Evolution of Pixel Level Snakes towards an efficient hardware implementation

Since pixel level snakes (PLS) were introduced, several algorithms implementing this cellular active contour technique have been proposed. In this paper, we review the main features of these algorithms and propose some modifications to optimize the computation performance of PLS when they are executed on fine-grain pixel-parallel processor arrays. The modified algorithm has been implemented on a focal plane cellular processor array (SCAMP-3 vision chip) and tested on several applications of practical interest.