DocumentCode :
465012
Title :
Evolution of Pixel Level Snakes towards an efficient hardware implementation
Author :
Vilariño, David Lopez ; Dudek, Piotr
Author_Institution :
Dept. of Electron. & Comput. Sci., Santiago de Compostela Univ.
fYear :
2007
fDate :
27-30 May 2007
Firstpage :
2678
Lastpage :
2681
Abstract :
Since pixel level snakes (PLS) were introduced, several algorithms implementing this cellular active contour technique have been proposed. In this paper, we review the main features of these algorithms and propose some modifications to optimize the computation performance of PLS when they are executed on fine-grain pixel-parallel processor arrays. The modified algorithm has been implemented on a focal plane cellular processor array (SCAMP-3 vision chip) and tested on several applications of practical interest.
Keywords :
cellular arrays; focal planes; image segmentation; SCAMP-3 vision chip; fine-grain pixel-parallel processor arrays; focal plane cellular processor array; hardware implementation; pixel level snakes; Active contours; Data mining; Discrete cosine transforms; Filling; Hardware; Image processing; Iterative algorithms; Pixel; Shape; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
Type :
conf
DOI :
10.1109/ISCAS.2007.377965
Filename :
4253229
Link To Document :
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